Wide bandwidth high efficiency power converter for rf amplifiers

Tradicionalmente, en el mundo de la amplificación de potencia de alta frecuencia, se han distinguido dos grandes familias de amplificadores de potencia, atendiendo al efecto de su utilización sobre las señales amplificadas por los mismos: lineales y no lineales. Los amplificadores lineales se han relacionado con las clases de amplificación A, B y AB generalmente poco eficaces en el aprovechamiento de la energía, mientras que los amplificadores no lineales se han asociado a clases de funcionamiento de alto rendimiento energético basadas (o no) en la conmutación: C, D, E, F y mixtas. Se debe precisar que estas definiciones son en si mismas excesivamente elementales. Así, por ejemplo, las exigencias de linealidad de ciertas señales de comunicaciones hacen que ni siquiera los amplificadores basados en clases de funcionamiento consideradas como lineales sirvan para la amplificación de señales con envolventes complejas, tanto de naturaleza analógica como digital, como por ejemplo las señales de difusión de televisión tanto en su vertiente analógica como digital. La extensión y el perfeccionamiento en el uso de las llamadas clases de amplificación de alto rendimiento basadas en conmutación (clases D, E, F y mixtas), junto con la explosión de las aplicaciones digitales de banda ancha, generalmente asociadas con envolventes complejas (no constantes), ha alentado mucho esfuerzo de investigación en electrónica de potencia y comunicaciones hacia el desarrollo de técnicas de linealización que permitan el uso de amplificadores de alto rendimiento, inherentemente muy alinéales, con señales de envolvente no constante. En electrónica de comunicaciones se han desarrollado varias técnicas para linealizar amplificadores de potencia: Back-Off, predistorsión, prealimentación, Doherty, Outphasing, Khan (EER, Envelope Elimination & Restoration), etc. Casi todas se han mostrado limitadas para proporcionar linealidad a amplificadores de alto rendimiento fuertemente alinéales en todo el margen dinámico de la señal amplificada. Solo la técnica EER (o técnica de Khan) ha resultado eficaz para linealizar amplificadores de alto rendimiento en clases caracterizadas por trabajar en conmutación y presentar una naturaleza muy alineal, además de conseguir dicho efecto en todo el margen dinámico de la señal amplificada, si bien a costa de un ancho de banda y niveles de intermodulación limitados. Las técnicas EER se basan en la utilización de un amplificador de alto rendimiento, muy alineal, junto con un amplificador de envolvente, también de alto rendimiento que proporciona la modulación de envolvente que el amplificador de alto rendimiento y alta frecuencia no puede reproducir. En esencia aprovechan el hecho de que una señal de banda estrecha queda bien definida conociendo su envolvente y su fase. Los principales inconvenientes técnicos que han impedido, hasta el momento, el uso masivo de las etapas de linealización EER se resumen seguidamente: El retraso introducido por el amplificador de envolvente que causa una desincronización entre la fase y la envolvente de la señal amplificada y que resulta muy difícil de controlar sin la ayuda de técnicas de procesado digital de la señal. El limitado ancho de banda de los convertidores continua-continua amplificadores de envolvente, resultado de la limitada velocidad de conmutación de los dispositivos activos semiconductores que los componen. Los errores introducidos en el proceso de linealización especialmente por los detectores de envolvente, tanto mayores cuanto mas grande es el margen dinámico de la señal a amplificar. La incapacidad de los amplificadores de alto rendimiento para trabajar a altas frecuencias y en banda ancha, causado en buena medida por las limitaciones impuestas por los dispositivos activos semiconductores en cuanto a tensión máxima, capacidades intrínsecas, tiempos de caída, resistencias de perdidas y los efectos parásitos introducidos por sus encapsulados que limitan tanto el grado de libertad de síntesis de redes de carga como la eficacia de los circuitos de excitación. El objetivo principal de la tesis es la investigación de una solución para el amplificador de envolvente. El rendimiento de esta fuente influirá en el rendimiento total del sistema, por lo que una especificación clave para la fuente sería alto rendimiento. Otros requisitos serán la tensión de salida que debería cambiar entre 0V y 24V y la potencia máxima de la carga estará entre 50 W y 100 W. El rizado de la tensión de la salida deberá ser despreciable, en el rango de decenas de mV. Esta condición influye mucho y complica el diseño del filtro de la salida de la fuente conmutada. La fuente tiene que ser capaz seguir una señal de alta dinámica (la señal de la envolvente) y por eso es necesario que tenga gran ancho de banda. Para obtener gran ancho de banda del amplificador de envolvente es necesario utilizar alta frecuencia de conmutación y finalmente el rendimiento del amplificador de envolvente baja significativamente y es necesario buscar otras soluciones distintas de las convencionales. La idea principal de esta tesis es utilizar una solución de dos etapas donde se encadenan un convertidor conmutado con un regulador lineal. El regulador conmutado no funcionará en lazo abierto, para no disminuirle su ancho de banda, y el filtro de salida no tiene que ser muy complicado, porque el rizado del convertidor reductor no pasará a través del regulador lineal. El regulador lineal estará realimentado y su tarea será garantizar que la tensión en la salida es la misma que la tensión mandada por la señal de referencia. El rendimiento de la segunda etapa depende directamente de la diferencia de las tensiones en su entrada y salida. Cuanto menor sea la diferencia mayor será el rendimiento. Mantener esta diferencia pequeña será la tarea para el control dentro de las dos etapas. En esta tesis se proponen dos arquitecturas diferentes para implementar el convertidor multinivel. La primera arquitectura está basada en las celdas de tensión que se ponen en serie para que se puedan combinar las tensiones generadas por ellas. Dentro de esta arquitectura se pueden distinguir dos soluciones, dependiendo si las celdas de tensión pueden reproducir dos o tres niveles. Aplicando una celda de dos o tres niveles significa un cambio importante en la etapa que sirve para alimentar las celdas, porque el convertidor que alimenta una celda de tres niveles tiene que ser bidireccional. La segunda arquitectura consta de varias fuentes de tensión y un multiplexador analógico que tiene que seleccionar la fuente apropiada dependiendo del nivel de la envolvente que se reproduce. Un convertidor como el convertidor multinivel propuesto tendría un gran ancho de banda, porque la velocidad de su reacción depende sólo de la velocidad de los interruptores que apagan y encienden las celdas. Salvo la tarea de construcción del convertidor multinivel, otros temas de la tesis son tanto buscar topologías que tengan aislamiento, como buscar el número óptimo de niveles y como distribuir estos niveles para maximizar el rendimiento del convertidor en total. Finalmente, el último tema de la tesis es la integración del amplificador de envolvente con un amplificador de clase E para demostrar las ventajas de la técnica de EER. Las principales aportaciones de la tesis doctoral se resumen a continuación Se ha propuesto una nueva solución para el amplificador de envolvente. La solución consta de un convertidor multinivel con un regulador lineal en serie. De esta manera se mantiene alto ancho de banda y alta linealidad del regulador lineal, pero se mejor su rendimiento. En la tesis se proponen dos arquitecturas diferentes para la implementación del convertidor multinivel. La primera arquitectura esta basada en las celdas de tensión que se pueden combinar para obtener varios niveles de tensión. La segunda arquitectura consta de fuentes independientes que se combinan con multiplexador analógico. Un método de optimización para mejorar el rendimiento total del sistema está propuesto en la tesis. Utilizando este método es posible decidir cuanto niveles es necesario generar con el convertidor multinivel y como hay que distribuirlos. La integración de un prototipo del amplificador de envolvente con un amplificador de clase E es la última aportación de la tesis. Durante este proceso se ha hecho un amplificador de EER completo y se han medido sus prestaciones. Como conclusión global del trabajo de investigación realizado cabe destacar que la presente tesis ha dado lugar a la creación y consolidación de una línea de investigación en el grupo de electrónica de potencia del Centro de Electrónica Industrial. Abstract Traditionally, in the solutions for the high frequency power amplifiers there can be distinguished two different families of power amplifiers: linear and nonlinear. The linear power amplifiers are the amplifiers from classes A, B or AB and they are known as highly linear, but inefficient solutions. On the other hand, the nonlinear power amplifiers have high power efficiency and their output is a sinusoidal signal with constant envelope. They are based on the idea to use transistors as switches instead as a current source. In that way the power losses of the devices are lower and these amplifiers are presented with classes C, D, E and F. In order to increase the spectral efficiency the modern telecommunication systems use complex modulations that are based on multicarrier signals and result in complex envelopes that require high linearity. These envelopes have high peak to average power ratio and the linear power amplifiers, due to this signal property, have extremely low efficiency. Because of the low efficiency of the linear solutions there has been a lot of research with the idea to extend the area of application of highly efficient non linear classes. This topic became important especially with the fast development of the digital wide bandwidth applications where the non constant envelope signals are applied and the necessary linearity of the power amplifier is very high. Until now, there have been used various techniques in order to increase the linearity: Back-Off, predistortion, Doherty, Outphasing, Khan’s technique, etc. Almost all of these techniques have not been able to provide high linearity and high efficiency in the complete range of the transmitted signal. Only the Kahn’s technique has showed that it is capable to linearize highly non linear power amplifier (for example class E) and to provide relatively high efficiency. This technique is based in the use of one highly efficienct, but non linear power amplifier that is used for the phase modulation, together with an envelope amplifier that has to have high efficiency and provide envelope modulation by modulating the voltage supply of the non linear power amplifier. Basically, this technique exploits the fact that any narrow band signal can be correctly defined by knowing its envelope and phase. Although the Kahn’s technique is very well known from the 50’s of the last century there have been various issues that have stopped this technique to be massively exploited. The short summary of these problems follows: The time delay produced by the envelope amplifier that produces asynchronism with the phase modulation. The synchronization between the envelope and phase modulation is of crucial importance for the overall linearity of the transmitter implemented by using Kahn’s technique. Due to this the time delay in the envelope modulation has to be properly compensated in the phase modulation The limited bandwidth of the dc-dc converters that are normally employed as the solution for the envelope amplifier. The errors that are produced by the envelope detector that is used in order to extract the envelope reference. These errors become more important as the active range of the signal is bigger. The impossibility for the semiconductor devices to operate at high frequencies and wide bandwidths due to the technology limits that are reflected as the maximal voltages, parasitic capacities, rise and fall times of the devices and parasitic effects of the package where the transistors are placed. The main objective of the thesis is the research of one possible solution for the envelope amplifier. The efficiency of this power supply has influence on the overall efficiency of the transmitter and the most important specification is the high efficiency of the solution. Other specifications are regarding the output voltage and the output power of the envelope amplifier. The envelope has to vary between 0 V and 24 V, while the peak output power ranges between 50 W and 100 W. The voltage ripple should be as small as possible, not higher than tens of mV. The last specification regarding the voltage ripple complicates the design of the output filter in the case that the switching converter is used as the envelope amplifier. The envelope amplifier has to generate envelopes with high dynamics and, therefore, the solution for the envelope amplifier has to exhibit high bandwidth. In the case of the desired application it is necessary to use very high switching frequency in order to obtain a wide bandwidth envelope amplifier and that eventually leads to the low efficiency and another approach, different from the conventional solutions, has to be made. The basic idea that is researched in this thesis is to use a two-stage solution that consists of switching converter in series with a linear regulator as a possible solution for the envelope amplifier. The switching converter supplies the wide bandwidth linear regulator in the way that its output voltage roughly follows the desired envelope and the voltage drop on the pass element of the linear regulator is minimal. In that way the envelope amplifier will have high linearity thanks to the linear regulator, but significantly higher efficiency than in the case when the linear regulator is supplied by a constant voltage. The switching converter operates in open loop and its output filter does not have to be very complicate because the linear regulator will eliminate all the noise and voltage ripple that comes from the switching converter. The linear regulator has a voltage loop and its task is to generate the envelope proportional to the envelope reference. The proposed solution for the first stage (the switching converter) is a multilevel converter that can be implemented in several ways. In this thesis two different architectures for the multilevel converter have been proposed. The first architecture is based on independent voltage cells that can be put in series in order to combine theirs output voltage. Depending how the voltage cells are implemented, there can be distinguished two solutions: two-level and threelevel cells. Employing one or another type of cell means great impact on the stage that is used to supply the voltage cells. In the case of three-level voltage cells this stage has to be bidirectional. The second architecture that is proposed is based on independent voltage sources and an analog multiplexer. The analog multiplexer has to select the appropriate voltage source depending on the level of the reproduced envelope signal. Except the construction of the multilevel converter, the topic of the thesis is to find the most appropriate solution for the envelope amplifier and the find the optimal number of voltage levels and their optimal distribution in order to maximize the envelope amplifier’s efficiency. Finally, the last topic of the thesis is the integration of the implemented envelope amplifier with a class E amplifier in order to show the advantage of the Kahn’s technique over linear solutions. The most important contributions of the thesis are as follows: A novel solution for the envelope amplifier has been proposed. The solution is based on a two-stage solution that is composed of a multilevel converter in series with a linear regulator. In the thesis two different architectures for the multilevel converter have been proposed. The first architecture is based on independent voltage cells that can be stacked, while the second one is based on the independent voltage sources combined via an analog multiplexer. An optimization process in order to select the optimal number of voltage levels and its distribution has been proposed. The integration of one envelope amplifier’s prototype with a class E amplifier. During the work on this thesis, a Kahn’s transmitter has been made and different tests have been done in order to characterize it regarding its efficiency and linearity. As the conclusion of the conducted research work it has to be said that this thesis created a new research line in the research group of the Centro de Electronica Industrial.

Mission Profile Based Optimization of a Synchronous-Buck DC-DC Converter for a Wearable Power System

A Wearable Power System (WPS) is a portable fuel-to-electrical energy converter that is carried on the body and is able to supply an average of 20 W for 4 days and has a total weight of less than 4 kg. Due to limited total weight of the system, each system part must have the highest efficiency to weight ratio. This paper presents the optimization of a synchronous buck DC-DC converter that is used to regulate the variable power source to a constant 14 VDC for the load. Higher switching frequency leads to smaller components and low weight, but at the same time, to higher losses that are compensated through additional fuel weight. If low switching frequency is applied, the weight of the converter will increase due to a larger inductor, but the power losses will be lower. Therefore, an optimal switching frequency should exist that results in the total weight of the DC-DC converter and additional fuel being a minimum. The paper first explains the proposed solution for WPS, the load pattern that is used to test the system and then the algorithm that decides on the number of converters to be used and how to find the optimal switching frequency. Additionally, two prototypes have been constructed. First prototype has nominal power of 20 W and is used in the analysis regarding the optimal number of converters. The second one has rated power of 200 W and it is built to support the conclusions based on the optimization process

Trade-off between Energy Savings and Execution Time Applying DVS to a Microprocessor

DVS (Dynamic Voltage Scaling) is a technique used for reducing the power consumption of microprocessors. The power consumed by these circuits has a main component (dynamic power) that is proportional to the square of the supply voltage. Additionally, for every supply voltage, there is a maximum value of the clock frequency. The advantage of using DVS is that the supply voltage (and hence clock frequency) can be adjusted depending on the specific needs during execution. The DVS concept has been used in some commercial products like Transmeta’s Crusoe [1], Intel Speed Step [2], AMD K6 [3], Hitachi SH4 [4], etc. The DVS algorithm proposed in this work is based on the trade-off between the application’s execution time and the energy consumed by the microprocessor. Indirectly, by controlling the execution time the consumed energy is controlled as well. Longer execution time provides less energy demanded by the CPU. The algorithm has been implemented on a platform with an Intel XScale PXA255 microprocessor and the energy saving has been calculated directly measuring currents and voltages on the platform. Using this technique it is possible to achieve up to 50% of power savings, with 50% longer execution time

A DVS system based on the trade-off between energy savings and execution time

DVS (Dynamic Voltage Scaling) is a technique used for reducing the power consumption of digital circuits. The power consumed by these circuits has a main component (dynamic power) that is proportional to the square of the supply voltage. Additionally, for every supply voltage, there is a maximum value of the clock frequency. The advantage of using DVS is that the supply voltage (and hence clock frequency) can be adjusted depending on the specific needs during execution. The DVS concept has been used in some commercial products like Transmeta’s Crusoe [1], Intel Speed Step [2], AMD K6 [3], Hitachi SH4 [4], etc. This paper presents results obtained by using a DVS algorithm based on the workload estimation and trade-off between the execution time and power savings. It is discussed about influence of the power supply’s slew rate, algorithms influence on the system performance and problems to estimate the processors workload. The DVS system is realized on Intel’s PXA255 platform and energy savings have been calculated by measuring directly voltages and currents on the platform

An overview of fast DC-DC converters for envelope amplifier in RF transmitters

In the last years, RF power amplifiers are taking advantage of the switched dc-dc converters to use them in several architectures that may improve the efficiency of the amplifier, keeping a good linearity. The use of linearization techniques such as Envelope Elimination and Restoration (EER) and Envelope Tracking (ET) requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier but theoretically the efficiency can be much higher than using the classical amplifiers belonging to classes A, B or AB. The purpose of this paper is to analyze the state of the art of the power converters used as envelope amplifiers in this application where a fast output voltage variation is required. The power topologies will be explored and several important parameters such as efficiency, bandwidth and output voltage range will be discussed

Switching capacities based envelope amplifier for high efficiency RF amplifiers

Modern transmitters usually have to amplify and transmit signals with simultaneous envelope and phase modulation. Due to this property of the transmitted signal, linear power amplifiers (class A, B or AB) are usually used as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has high peak-to-average power ratio (PAPR). The Kahn envelope elimination and restoration (EER) technique is used to enhance efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class E) with a highly efficient envelope amplifier in order to obtain linear and highly efficient RF amplifier. This paper presents a solution for the envelope amplifier based on a multilevel converter in series with a linear regulator. The multilevel converter is implemented by employing voltage dividers based on switching capacities. The implemented envelope amplifier can reproduce any signal with maximum spectral component of 2 MHz and give instantaneous maximum power of 50 W. The efficiency measurements show that when the signals with low average value are transmitted, the implemented prototypes have up to 20% higher efficiency than linear regulator that is used as a conventional solution

Impact of the flying capacitor on the boost converter

This paper illustrates the impact of including a flying capacitor in a Boost converter. Both topologies, Boost and Boost with Flying Capacitor, are compared in terms of efficiency and volume. Results obtained from an optimization algorithm are validated through simulations and a hardware prototype

Multiphase Buck Converter with Minimum Time Control Strategy for RF Envelope Modulation

Power amplifier supplied with constant supply voltage has very low efficiency in the transmitter. A DC-DC converter in series with a linear regulator can be used to obtain voltage modulation. Since this converter should be able to change the output voltage very fast, a multiphase buck converter with a minimum time control strategy is proposed. To modulate supply voltage of the envelope amplifier, the multiphase converter works with some particular duty cycle (i/n, i=1, 2 ... n, n is the number of phase) to generate discrete output voltages, and in these duty cycles the output current ripple can be completely cancelled. The transition times for the minimum time are pre-calculated and inserted in a look-up table. The theoretical background, the system model that is necessary in order to calculate the transition times and the experimental results obtained with a 4-phase buck prototype are give

45kW Full Bridge Converter with Discontinuous Primary Current for High Efficiency Airborne Application

This paper presents and describes the design and optimization process of a high power density 45kW DC/DC converter for aircraft application. This onverter is a part of an isolated rectifier for a military aircraft pulsating load. It has to provide galvanic isolation and good stability when the load steps as high as 40 kW are applied. In order to obtain high efficiency, on the primary side of the converter a discontinuous triangular current modulation is implemented. High power density is obtained by relatively high switching frequency of 10 kHz and by implementation of the transformer using a nanocrystalline material that enables high magnetic flux density (up to 1T) and copper foils for conductors. The expected efficiency of the converter is 97.6% and the total weight of the system is 7.6 kg

Optimized Design of GaN Switching Capacitor Based Envelope Tracking Power Supply for Satellite Applications

In modern communication system, both the bandwidth and peak-to-average power ratio of the transmitted signal are increasing rapidly. As a result, the power amplifiers based on linear power amplifiers such as class A, B or AB suffer from very low efficiency. The most promising solutions are the Envelope Tracking (ET) and Envelope Elimination and Restoration (EER) techniques, which can greatly improve the efficiency by employing a dynamic power supply that tracks the envelope of the transmitted signal. This paper presents an implementation of the ET power supply based on a multilevel converter in series with a linear regulator for a satellite application. The multilevel converter consists of a switching capacitors based converter in order to have highly efficient and light solution because the weight of power supply, together with its efficiency, is of the outmost importance for the application. A prototype capable of following a 5MHz RF envelope signal with maximum output power of 40W is fabricated. The experimental results verify the effectiveness of the proposed solution with 96.15% efficiency for the multilevel converter and 75% for the ET power supply. Furthermore, an experimental comparison between Silicon and GaN transistors is conducted in order to verify the benefits of GaN transistors